The present invention relates generally to semiconductor structures, and more specifically, to a method for fabricating a self-aligned lower bottom electrode for a semiconductor structure which does not require a lithographic masking process, is substantially seam free, and which has minimal topography (i.e., is flat).
A memory cell requires a highly scaled portion of the memory cell to be defined. In one conventional method, a mushroom-type phase change memory cell is formed by first forming a flat lower bottom electrode on which a scaled bottom electrode is formed. The lower bottom electrode may be made by forming a lithography-defined hole, filling the hole with a conductive material and then performing a polishing process to polish the conductive material.
There are several problems associated with the conventional method. These problems include the need for an additional lithography process. The lithography process requires additional costs and may result in an undesirable alignment of the of the lower bottom electrode.